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24 lines
770 B
Markdown
24 lines
770 B
Markdown
# iverilog
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> Preprocesses and compiles Verilog HDL (IEEE-1364) code into executable programs for simulation.
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> More information: <https://github.com/steveicarus/iverilog>.
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- Compile a source file into an executable:
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`iverilog {{path/to/source.v}} -o {{path/to/executable}}`
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- Compile a source file into an executable while displaying all warnings:
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`iverilog {{path/to/source.v}} -Wall -o {{path/to/executable}}`
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- Compile and run explicitly using the VVP runtime:
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`iverilog -o {{path/to/executable}} -tvvp {{path/to/source.v}}`
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- Compile using Verilog library files from a different path:
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`iverilog {{path/to/source.v}} -o {{path/to/executable}} -I{{path/to/library_directory}}`
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- Preprocess Verilog code without compiling:
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`iverilog -E {{path/to/source.v}}`
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