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24 lines
642 B
Markdown
24 lines
642 B
Markdown
# iverilog
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> Preprocesses and compiles Verilog HDL (IEEE-1364) code, into executable programs for simulation.
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> More information: <http://iverilog.icarus.com/>.
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- Compile a source file into an executable:
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`iverilog {{source.v}} -o {{executable}}`
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- Also display all warnings:
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`iverilog {{source.v}} -Wall -o {{executable}}`
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- Compile and run explicitly using the VVP runtime:
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`iverilog -o {{executable}} -tvvp {{source.v}}`
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- Compile using Verilog library files from a different path:
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`iverilog {{source.v}} -o {{executable}} -I{{path/to/library_directory}}`
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- Preprocess Verilog code without compiling:
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`iverilog -E {{source.v}}`
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